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| IPP13N03LB G OptiMOS(R)2 Power-Transistor Features * Ideal for high-frequency dc/dc converters * Qualified according to JEDEC1) for target application * N-channel - Logic level * Excellent gate charge x R DS(on) product (FOM) * Very low on-resistance R DS(on) * Superior thermal resistance * 175 C operating temperature * dv /dt rated * Pb-free lead plating; RoHS compliant Product Summary V DS R DS(on),max ID 30 12.8 30 V m A PG-TO220-3-1 Type IPP13N03LB G Package PG-TO220-3-1 Marking 13N03LB Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 C2) T C=100 C Pulsed drain current Avalanche energy, single pulse Reverse diode dv /dt Gate source voltage4) Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 1) Value 30 30 120 64 6 20 Unit A I D,pulse E AS dv /dt V GS P tot T j, T stg T C=25 C3) I D=30 A, R GS=25 I D=30 A, V DS=20 V, di /dt =200 A/s, T j,max=175 C mJ kV/s V W C T C=25 C 52 -55 ... 175 55/175/56 J-STD20 and JESD22 Rev. 0.95 page 1 2008-05-06 IPP13N03LB G Parameter Symbol Conditions min. Thermal characteristics Thermal resistance, junction - case SMD version, device on PCB R thJC R thJA minimal footprint 6 cm2 cooling area5) Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=20 A V DS=30 V, V GS=0 V, T j=25 C V DS=30 V, V GS=0 V, T j=125 C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=4.5 V, I D=20 A V GS=10 V, I D=30 A Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=60 A 30 1.2 1.6 0.1 2 1 A V 2.9 62 40 K/W Values typ. max. Unit - 10 1 15.2 10.7 1 57 100 100 18.9 12.8 S nA m 2) 3) 4) Current is limited by bondwire; with an R thJC=2.9 K/W the chip is able to carry 47 A. See figure 3 T j,max=150 C and duty cycle D <0.25 for V GS<-5 V 5) 2 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 m thick) copper area for drain connection. PCB is vertical in still air. 5 Diagrams are related to straight lead versions. Rev. 0.95 page 2 2008-05-06 IPP13N03LB G Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 6) Gate to source charge Gate charge at threshold Gate to drain charge Switching charge Gate charge total Gate plateau voltage Gate charge total, sync. FET Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage IS I S,pulse V SD T C=25 C V GS=0 V, I F=80 A, T j=25 C V R=15 V, I F=I S, di F/dt =400 A/s 1.23 78 120 1.2 V A Q gs Q g(th) Q gd Q sw Qg V plateau Q g(sync) Q oss V DS=0.1 V, V GS=0 to 5 V V DD=15 V, V GS=0 V V DD=15 V, I D=40 A, V GS=0 to 5 V 4.0 1.6 2.3 5 8 3.9 7 8 5 2.2 3.5 7 10 9 11 V nC nC C iss C oss Crss t d(on) tr t d(off) tf V DD=15 V, V GS=10 V, I D=20 A, R G=2.7 V GS=0 V, V DS=15 V, f =1 MHz 1019 364 49 4 4 16 2.8 1355 485 74 7 6 24 4.2 ns pF Values typ. max. Unit Reverse recovery charge Q rr - - 10 nC 6) See figure 16 for gate charge parameter definition Rev. 0.95 page 3 2008-05-06 IPP13N03LB G 1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); V GS10 V 60 40 50 30 40 P tot [W] 30 I D [A] 0 50 100 150 200 20 20 10 10 0 0 0 50 100 150 200 T C [C] T C [C] 3 Safe operating area I D=f(V DS); T C=25 C; D =0 parameter: t p 1000 4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T 10 0.5 1 100 limited by on-state resistance 10 s 1 s 0.2 0.1 Z thJC [K/W] 0.05 I D [A] DC 100 s 0.1 0.02 0.01 single pulse 10 1 ms 10 ms 0.01 1 0.1 1 10 100 0.001 10-6 0 10-5 0 10-4 0 10-3 0 10-20 10-1 0 100 1 V DS [V] t p [s] Rev. 0.95 page 4 2008-05-06 IPP13N03LB G 5 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS 100 90 80 70 60 4.5 V 10 V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 C parameter: V GS 100 3 V 3.2 V 3.8 V 4.1 V 90 80 70 4.5 V 2.8 V R DS(on) [m] 60 50 40 30 I D [A] 50 40 4.1 V 3.8 V 30 20 10 0 0 1 2 3 3.5 V 20 10 0 0 20 40 60 80 100 10 V 3.2 V 3V 2.8 V V DS [V] I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 8 Typ. forward transconductance g fs=f(I D); T j=25 C 70 100 60 80 50 g fs [S] 175 C 25 C I D [A] 60 40 30 40 20 20 10 0 0 1 2 3 4 5 0 0 20 40 60 80 V GS [V] I D [A] Rev. 0.95 page 5 2008-05-06 IPP13N03LB G 9 Drain-source on-state resistance R DS(on)=f(T j); I D=50 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D 2.5 24 22 20 18 200 A 2 16 R DS(on) [m] 98 % 14 12 10 8 6 typ V GS(th) [V] 1.5 20 A 1 0.5 4 2 0 -60 -20 20 60 100 140 180 0 -60 -20 20 60 100 140 180 T j [C] T j [C] 11 Typ. Capacitances C =f(V DS); V GS=0 V; f =1 MHz 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 10000 1000 Ciss 1000 Coss 100 175 C 25 C 175C 98% C [pF] I F [A] 25C 98% 100 Crss 10 10 0 5 10 15 20 25 30 1 0.0 0.5 1.0 1.5 2.0 V DS [V] V SD [V] Rev. 0.95 page 6 2008-05-06 IPP13N03LB G 13 Avalanche characteristics I AS=f(t AV); R GS=25 parameter: Tj(start) 100 14 Typ. gate charge V GS=f(Q gate); I D=40 A pulsed parameter: V DD 12 15 V 10 5V 20 V 25 C 100 C 150 C 8 10 V GS [V] 1 10 100 1000 I AV [A] 6 4 2 1 0 0 10 20 t AV [s] Q gate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA 16 Gate charge waveforms 38 V GS 36 34 32 Qg V BR(DSS) [V] 30 28 26 24 22 20 -60 -20 20 60 100 140 180 V g s(th) Q g(th) Q gs Q sw Q gd Q g ate T j [C] Rev. 0.95 page 7 2008-05-06 IPP13N03LB G PG-TO220-3-1 Packaging Rev. 0.95 page 8 2008-05-06 IPP13N03LB G Published by Infineon Technologies AG 81726 Munich, Germany (c) 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 0.95 page 9 2008-05-06 |
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